DE1-SoC Rhythm Game
Built a real-time rhythm game in SystemVerilog with custom VGA graphics, button-timing feedback, and PWM audio synthesis through GPIO.
I work across FPGAs, embedded systems, and the software that brings complex hardware into useful, working systems.
I’m a Computer Engineering student at Virginia Tech with a Green Engineering minor. From FPGA signal processing and SDR infrastructure to solar-car telemetry, I like work that connects design decisions to how a real system performs.
B.S. Computer Engineering, expected May 2027 · Honors College Engineering Scholar
Hardware, software, and the integration work between them.
Built a real-time rhythm game in SystemVerilog with custom VGA graphics, button-timing feedback, and PWM audio synthesis through GPIO.
Developing a prototype for SEW-EURODRIVE to detect and localize damage across helical, helical-bevel, and worm gears, with an automated OK/NOK result.
Leading an eight-person telemetry team building car-to-pit RF communications, live data visualization, and race-strategy tools. Developed Python route-analysis tools using mapping data.
Designed NMOS, PMOS, and CMOS inverter layouts during a U.S.–Japan semiconductor intensive and characterized devices with I–V measurements.
Parsons Corporation
Modified VHDL signal-processing IP for QSFP/Aurora streaming, assessed FPGA boards for FIR workloads, and built C++/Docker tooling to integrate MATLAB signal files into an SDR environment.
Parsons Corporation
Worked on event-driven SDR scheduling and Java webserver file-handling, including HTTP endpoints, data transfer objects, PostgreSQL, and Docker-based integration.
Virginia Tech · Bradley Department of ECE
Guided 26 teams building blood-pressure monitors and supported hardware assembly, soldering, and debugging of sensors, pumps, and valves.
I’m interested in embedded systems, FPGA development, and hands-on engineering teams.
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